Modular Firmware IP Best Practices

Due to long development cycles (and short schedules!), firmware designers often struggle to generate modular intellecutal property (IP) that is reusable between applications. Modularity relies heavily upon parameterization which can be a difficult challenge in firmware design. Instead of a single IDE with an integrated compiler, parameters are scattered across HDL design files, modeling tools (MATLAB/Octave/Python), vendor tools (Vivado/Quartus/Libero), and simulation tools (QuestaSim/Cadence). The modification of these parameters must be synchronized when reusing IP.

Analog Devices FMCOMMS via Yocto

Recently, we developed a capability that combined an Analog Devices FMCOMMS3 dual-transceiver FMC card with a Xilinx ZC706 Development kit and represents that system as a combined REDHAWK FrontEnd Interfaces and Persona Device. The ZC706 is another Xilinx Zynq -based system similar to the more common ZedBoard and ZC702 development kits except that it provides […]