FPGA
Press Release: VITA49.2 IP Core
Introducing VITA49.2 IP Core Need VITA49.2 data/context/command packet processing on your FPGA? Geon’s VITA49.2 IP Core is on the Xilinx marketplace. Ask us about MORA, too! Contact Us
IRAD
IRAD
Press Release: Vita 49.2 Tooling
Geon is proud to announce the release of an innovative solution called vrtgen that simplifies VITA 49.2 development and integration as free-and-open source (FOSS) and a wireshark plugin integrated with vrtgen. Overview In software development, a well-polished interface makes everyone’s
AMR
Automatic Modulation Recognition on the Jetson TX2
Offline Automatic Modulation Recognition Automatic Modulation Recognition (AMR) is a system designed to classify modulation schemes based on input in-phase and quadrature (I/Q) data. With the emergence of Deep Learning (DL), AMR has shown promising results in being able to
IRAD
TDOA User Interface Improvements
Geon has made significant improvements to the Time-Difference of Arrival (TDOA) project on both the front-end and back-end. On the front-end, the user experience has been significantly improved. Visual consistency was added for mobile users. Additionally, terminal inputs have been
IRAD
Multi-Input Data Fused Image Processing System
Geon has successfully developed a prototype of our Multi-Input Data Fused Image Processing System (MIDFIPS) under the Navy Technology Acceleration Program. MIDFIPS is an Artificial Intelligence/Machine Learning (AI/ML) based image-processing payload designed to provide a complete operating picture for surveillance