ZCU111

Vivado

Disable CPU Idling on the ZCU111 When Using the Vivado ILA

For the ZCU111 and ZCU102 development boards (and possibly other Ultrascale development boards), Xilinx has configured by default to idle the ARM processor when using the Vivado Hardware Manager and Vivado ILA. The following steps detail how to add a

100G

FPGA Projects Spotlight

Geon Technologies is well-known for leading the industry in software-defined radio (SDR) frameworks like REDHAWK SDR. However, Geon’s growing portfolio of exciting FPGA projects deserve the spotlight too! This post gives you a recap of some of the FPGA projects

Ethernet

ZCU111 NIC – 100G Ethernet Subsystem & Quad SFP28

Introduction Geon has kicked off a design using Xilinx’s ZCU111 Evaluation Board along with the 100G Ethernet Subsystem IP core. In order to confirm our understanding of the IP core paired with the ZCU111’s Quad SPF28 cage, we have developed

BSP

Zynq UltraScale+ in OpenCPI – ZCU102 and ZCU111

Introduction As a component-based framework for heterogeneous processing, OpenCPI may play a critical role in the future of FPGA development. Already supported on various Zynq platforms such as the Zedboard, Matchstiq-Z1 and Ettus E310, OpenCPI has proven an interesting and