Geon has a long history of developing OpenCPI OSPs and is pleased to announce the release of our latest OpenCPI zrf8_48dr OSP for the HiTech Global HTG-ZRF8: Xilinx Zynq UltraScale+ RFSoC Development Platform. As with the previously released OSPs, documentation
In January, Geon announces the release of several OpenCPI OSPs that targeted Zynq-7000 and Zynq UltraScale+ development boards, with a press release preview that an OSP would also be released in the 1st quarter. As promised, Geon is proud to
Introducing VITA49.2 IP Core Need VITA49.2 data/context/command packet processing on your FPGA? Geon’s VITA49.2 IP Core is on the Xilinx marketplace. Ask us about MORA, too! Contact Us
For the ZCU111 and ZCU102 development boards (and possibly other Ultrascale development boards), Xilinx has configured by default to idle the ARM processor when using the Vivado Hardware Manager and Vivado ILA. The following steps detail how to add a
Geon Technologies is well-known for leading the industry in software-defined radio (SDR) frameworks like REDHAWK SDR. However, Geon’s growing portfolio of exciting FPGA projects deserve the spotlight too! This post gives you a recap of some of the FPGA projects
Geon has developed a Frequency Estimator IP which can perform FFTs of configurable bin size to estimate the frequency of an RF input. The IP achieves high precision while consuming few resources. Development and integration of the IP was accelerated
I’m often asked if we at the Advanced Solutions Group office can install REDHAWK on a fill in the blank. And at this point it should come as no surprise that the tooling we turn to is from the Yocto
Introduction Geon has kicked off a design using Xilinx’s ZCU111 Evaluation Board along with the 100G Ethernet Subsystem IP core. In order to confirm our understanding of the IP core paired with the ZCU111’s Quad SPF28 cage, we have developed
A few of us recently worked on a design that combined a Xilinx Zynq platform with the precision time protocol v2 (PTPv2, a.k.a. IEEE 1588-2008). You can find more details about the protocol here, but the summary is it can
Introduction As a component-based framework for heterogeneous processing, OpenCPI may play a critical role in the future of FPGA development. Already supported on various Zynq platforms such as the Zedboard, Matchstiq-Z1 and Ettus E310, OpenCPI has proven an interesting and